HI Greetings for the day!!1I am hiring for TOP MNC for VLSI Design Engineer, check the attached  JD for more clarity,kindly revert with below details ON swati@thinkpeople.inTotal ExperienceRel ExpCurr...

Job Details: Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and ...

 Job Details:  : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification pla...

ASIC Design Verification Engineer || UVM/System Verilog || Test benches || Exp 4 to 7 yearsMeet the TeamThe Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing,...

Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We craft the networking hardware for Enterprises and Service Provi...

Your ImpactDevelop test plans, cover points, and qualification testsPerform end-to-end verification of design blocks and top-levelBuild and maintain block, cluster, and top-level DV environment infrastructureConstruct testben...

Hiring Now ASIC Design Verification Experts | Automotive Chip Projects Location: Bangalore, Pune, Noida, Chennai Experience: 3 to 20+ Years | Notice Period: Immediate to 45 Days Send Resume to: prabhu.p@acldigital.com JD 1:...

Design Verification Engineer (5 to 12 Years) SoC/IP Verification Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore/Pune] Experience: 5 to 12 YearsOpenings: 10 Positions Preferred - Immediate to 45 Days (Not...

Dear CandidateWe have immediate job openings for Design verification openingsExp : 3-10 yearsLocation : BangaloreNP : less than 45 days Job details : Develop and maintain UVM-based verification environments.Define ...

Position: (VLSI) Design Verification (DV) Desired Profile Skills: Functional specifications of the IPs, subsystems and SOC Reviewing and Revising System Verilog UVM Performing RTL simulations using Synopsys and Cadence ...

Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science or equivalent practical experience. 8 years of experience verifying digital logic at RTL using System Verilog for FPGAs and ASICs. Exp...

Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification Develop functional tests based on verification test plan ...

Greeting form Globex Digital.!  Please find the job description for _Design Verification Engineer  interested please revert back with updated resume.  JD: Design Verification Engineer Experience: 5-15 Years ...

Coding hands on SV/UVM Can work independently on tasks such code UVM/SV based components/relevant logic, test case development Can debug test failures and root cause issues independently in complex design. Have exposu...